x86/vioapic: allow PVHv2 Dom0 to have more than one IO APIC
authorRoger Pau Monné <roger.pau@citrix.com>
Wed, 5 Apr 2017 14:47:09 +0000 (16:47 +0200)
committerJan Beulich <jbeulich@suse.com>
Wed, 5 Apr 2017 14:47:09 +0000 (16:47 +0200)
commit88ad3208bb9a2e9516850d8480a5a323846dd0ed
treec7d54fabb80af88ad017ad65806e979f3aa5d088
parent9f44b08f7d0e47730176d7f3872921d3301571b3
x86/vioapic: allow PVHv2 Dom0 to have more than one IO APIC

The base address, id and number of pins of the vIO APICs exposed to PVHv2 Dom0
is the same as the values found on bare metal.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/hvm/dom0_build.c
xen/arch/x86/hvm/hvm.c
xen/arch/x86/hvm/vioapic.c